PCI Express to PCI Express based Low Latency Interconnect Scheme for Clustering Systems

ABSTRACT

PCI Express (PCIE) is an IO interconnect standard that is implemented as a tree network with a root complex connecting to a CPU as the root node for use inside the computer for connecting to peripheral devices. Currently PCIE has achieved stability such that PCIE can be used as a basis for other applications. A PCIE based scheme inter-connecting multiple PCIE enabled computer systems each having at least one PCIE root complex controlling at least a PCIE bus, enabling the scalability of PCIE architecture to be applied for data transport between the connected system cluster is proposed. The interconnection uses an outbound port enabled for system interconnection on the PCIE bus of each PCIE enabled computer connecting to one inbound port on an independently programmable network switch having a plurality of inbound ports. The interconnection is using PCIE protocol for data transfer within the cluster.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. patent application Ser. No. 17/858,083 filed on Jul. 6, 1922 which is pending, claims priority to U.S. patent application Ser. No. 17/523,878, titled “PCI Express. to PCI Express based low latency interconnect scheme for clustering systems” filed on Nov. 10, 2021 which is pending claims priority to U.S. patent application Ser. No. 15/175,800 titled “PCI Express. to PCI Express based low latency interconnect scheme for clustering systems” filed on Jun. 7, 2016, which issued as U.S. Pat. No. 11,194,754 od Dec. 7, 2021 which is a continuation of U.S. application Ser. No. 14/588,937 titled “PCI Express. to PCI Express based low latency interconnect scheme for clustering systems' filed on Jan. 3, 2015 which issued as a U.S. Pat. No. 9,519,708 on Dec. 13, 2016 is a continuation of U.S. patent application Ser. No. 13/441,883 titled “PCI Express to PCI Express based low latency interconnect scheme for clustering systems” filed on Apr. 8, 2012, currently abandoned, which is a continuation of U.S. patent application Ser. No. 11/242,463 titled “PCI Express to PCI Express based low latency interconnect scheme for clustering systems” filed on Oct. 4, 2005 which issued as U.S. Pat. No. 8,189,603 on May 29, 2012, all of which have a common inventor, and are hereby incorporated by reference for all that they contain.

TECHNICAL FIELD

The invention generally relates to providing high speed interconnect between systems within an interconnected cluster of systems and specifically relates to providing high speed interconnect between root complexes controlled PCIE bus of PCIE enabled systems within an interconnected cluster of PCIE enabled systems, each PCIE enabled system having at least a root complex controlling a PCIE bus of the PCIE enabled system.

BACKGROUND AND PRIOR ART

The need for high speed and low latency cluster interconnect scheme for data and information transport between systems have been recognized as a limiting factor to achieving high speed operation in clustered systems and one needing immediate attention to resolve. The growth of interconnected and distributed processing schemes have made it essential that high speed interconnect schemes be defined and established to provide the speeds necessary to take advantage of the high speeds being achieved by data processing systems and enable faster data sharing between interconnected systems.

There are today interconnect schemes that allow data transfer at high speeds, the most common and fast interconnect scheme existing today is the Ethernet connection allowing transport speeds from 10 MB to as high as 10 GB/sec. TCP/IP protocols used with Ethernet have high over-head with inherent latency that make it unsuitable for some distributed applications.

Further TCP/IP protocol tends to drop data packets under high traffic congestion times, which require resend of the lost packets which cause delays in data transfer and is not acceptable for high reliability system operation. Recent developments in optical transport also provide high speed interconnect capability. Efforts are under way in different areas of data transport to reduce the latency of the interconnect as this is a limitation on growth of the distributed computing, control and storage systems. All these require either changes in transmission protocols, re-encapsulation of data or modulation of data into alternate forms with associated delays increase in latencies and associated costs.

DESCRIPTION

What is Proposed

PCI Express (PCIE) has achieved a prominent place as the I/O interconnect standard for use inside computers, processing system and embedded systems that allow serial high speed data transfer to and from peripheral devices. The typical PCIE provides 2.5-3.8 GB transfer rate per link (this may change as the standard and data rates change). The PCIE standard is evolving fast, becoming faster and starting become firm and used within more and more systems. Typically each PCIE based system has a root complex which controls all connections and data transfers to and from connected peripheral devices through PCIE peripheral end points or peripheral modules. What is disclosed is the use of PCIE standard based peripherals enabled for interconnection to similar PCIE standard based peripheral connected directly using data links, as an interconnect between multiple systems, typically through one or more network switches. This interconnect scheme by using PCIE based protocols for data transfer over direct physical connection links between the PCIE based peripheral devices, (see FIG. 1 ), without any intermediate conversion of the transmitted data stream to other data transmission protocols or encapsulation of the transmitted data stream within other data transmission protocols, thereby reducing the latencies of communication between the connected PCI based systems within the cluster. The PCIE standard based peripheral enabled for interconnection at a peripheral end point of the system, by directly connecting using PCIE standard based peripheral to PCIE standard based peripheral direct data link connections to the switch, provides for increase in the number of links per connection as bandwidth needs of system interconnections increase and thereby allow scaling of the band width available within any single interconnect or the system of interconnects as required.

Some Advantages of the Proposed Connection Scheme:

-   -   1. Reduced Latency of Data transfer as conversion from PCIE to         other protocols like Ethernet are avoided during transfer.     -   2. The number of links per connection can scale from X1 to         larger numbers X32 or even X64 as PCIE capabilities increase to         cater to the connection bandwidth needed. Minimum change in         interconnect architecture is needed with increased bandwidth,         enabling easy scaling with need.     -   3. Any speed increase in the link connection due to technology         advance is directly applicable to the interconnection scheme.     -   4. Standardization of the PCIE based peripheral will make         components easily available from multiple vendors, making the         implementation of interconnect scheme easier and cheaper.     -   5. The PCIE based peripheral to PCIE based peripheral links in         connections allow ease of software control and provide reliable         bandwidth.

DESCRIPTION OF FIGURES

FIG. 1 Typical Interconnected (multi-system) cluster (shown with eight systems connected in a star architecture using direct connected data links between PCIE standard based peripheral to PCIE standard based peripheral)

FIG. 2 —is a cluster using multiple interconnect modules or switches to interconnect smaller clusters.

EXPLANATION OF NUMBERING AND LETTERING IN FIG. 1

(1) to (8): Number of Systems interconnected in FIG. 1 (9): Switch sub-system. (10): Software configuration and control input for the switch. (1 a) to (8 a): PCI Express based peripheral module (PCIE Modules) attached to systems. (1 b) to (8 b): PCI Express based peripheral modules (PCIE Modules) at switch. (1L) to (8L): PCIE based peripheral module to PCIE based peripheral module connections having n-links (n-data links)

EXPLANATION OF NUMBERING AND LETTERING IN FIG. 2

(12-1) and (12-2): clusters (9-1) and (9-2): interconnect modules or switch sub-systems. (10-1) and (10-2): Software configuration inputs (11-1) and (11-2): Switch to switch interconnect module in the cluster (11L): Switch to switch interconnection

DESCRIPTION OF INVENTION

PCI Express (PCIE) was developed as an IO interconnect standard that is implemented as a tree network with a root complex connecting to a CPU having one or more processors. The root complex acts as the root node for use inside the computer for connecting to peripheral devices. Currently PCIE has achieved stability such that PCIE can be used as a basis for other applications. A PCIE based scheme inter-connecting multiple PCIE enabled computer systems each having at least one PCIE root complex controlling at least a PCIE bus, enabling the scalability of PCIE architecture to be applied for data transport between the connected system cluster is proposed.

The interconnection uses an outbound port enabled for system interconnection on the PCIE bus of each PCIE enabled computer connecting to one inbound port on an independently programmable network switch having a plurality of inbound ports. The interconnection is using PCIE protocol for data transfer within the cluster.

PCIE is a Bus standard for use inside the computer or embedded system enabling faster data transfers to and from peripheral devices. The standard is still evolving but has achieved a degree of stability such that other applications can be implemented using PCIE as basis. A PCIE based interconnect scheme to enable switching and inter-connection between multiple PCIE enabled systems each having its own PCIE root complex, such that the scalability of PCIE architecture can be applied to enable data transport between connected systems to form a cluster of systems, is proposed. These connected PCIE enabled systems can be any computing, control, storage or embedded systems. The scalability of the interconnect will allow the cluster to grow the bandwidth between the systems as they become necessary without changing to a different connection architecture.

FIG. 1 is a typical cluster interconnect. The Multi-system cluster shown consist of eight units or systems {(1) to (8)} that are to be interconnected. Each system is PCI Express (PCIE) based system with a PCIE root complex for control of data transfer to and from connected peripheral devices via PCIE peripheral modules as is standard for PCIE based systems. Each system to be interconnected has at least a PCIE based peripheral module {(1 a) to (8 a)} as an IO module, at the interconnect port enabled for system interconnection, with n-links built into or attached to the system. (9) is an interconnect module or a switch sub-system, which has number of PCIE based connection modules equal to or more than the number of systems to be interconnected, in this case of FIG. 1 this number being eight {(1 b) to (8 b)}, that can be interconnected for data transfer through the switch. A software based control input is provided to configure and/or control the operation of the switch and enable connections between the switch ports for transfer of data. Link connections {(1L) to (8L)} attach the PCIE based peripheral modules 1 a to 8 a, enabled for interconnection on the respective systems 1 to 8, to the on the switch with n links. The value of n can vary depending on the connect band width required by the system.

When data has to be transferred between say system 1 and system 5, in the simple case, the control is used to establish an internal link between PCIE based peripheral modules 1 b and 5 b at the respective ports of the switch. A hand shake is established between outbound communication enabled PCIE based peripheral module (PCIE Module) la and inbound PCIE module 1 b at the switch port and outbound PCIE module 5 a on the switch port and inbound communication enabled PCIE module 5 b. This provides a through connection between the PCIE modules 1 a to 5 b through the switch allowing data transfer. Data can then be transferred at speed between the modules and hence between systems. In more complex cases data can also be transferred and queued in storage implemented in the switch, at the ports and then when links are free transferred out to the right systems at speed.

Multiple systems can be interconnected at one time to form a multi-system that allow data and information transfer and sharing through the switch. It is also possible to connect smaller clusters together to take advantage of the growth in system volume by using an available connection scheme that interconnects the switches that form a node of the cluster.

If need for higher bandwidth and low latency data transfers between systems increase, the connections can grow by increasing the number of links connecting the PCIE modules between the systems in the cluster and the switch without completely changing the architecture of the interconnect. This scalability is of great importance in retaining flexibility for growth and scaling of the cluster.

It should be understood that the system may consist of peripheral devices, storage devices and processors and any other communication devices. The interconnect is agnostic to the type of device as long as they have a PCIE module at the port to enable the connection to the switch. This feature will reduce the cost of expanding the system by changing the switch interconnect density alone for growth of the multi-system.

PCIE is currently being standardized and that will enable the use of the existing PCIE modules to be used from different vendors to reduce the over all cost of the system. In addition using a standardized module in the system as well as the switch will allow the cost of software development to be reduced and in the long run use available software to configure and run the systems.

As the expansion of the cluster in terms of number of systems, connected, bandwidth usage and control will all be cost effective, it is expected the over all system cost can be reduced and over all performance improved by standardized PCIE module use with standardized software control.

Typical connect operation may be explained with reference to two of the systems, example system (1) and system (5). System (1) has a PCIE module (1 a) at the interconnect port and that is connected by the connection link or data-link or link (1L) to a PCIE module (lb) at the IO port of the switch (9). System (5) is similarly connected to the switch trough the PCIE module (5 a) at its interconnect port to the PCIE module (5 b) at the switch (9) IO port by link (5L). Each PCIE module operates for transfer of data to and from it by standard PCI Express protocols, provided by the configuration software loaded into the PCIE modules and switch. The switch operates by the software control and configuration loaded in through the software configuration input.

FIG. 2 is that of a multi-switch cluster. As the need tom interconnect larger number of systems increase, it will be optimum to interconnect multiple switches of the clusters to form a new larger cluster. Such a connection is shown in FIG. 2 . The shown connection is for two smaller clusters (12-1 and 12-2) interconnected using PCIE modules that can be connected together using any low latency switch to switch connection (11-10 and 11-2), connected using interconnect links (11L) to provide sufficient band width for the connection. The switch to switch connection transmits and receives data and information using any suitable protocol and the switches provide the interconnection internally through the software configuration loaded into them.

The following are some of the advantages of the disclosed interconnect scheme 1. Provide a low latency interconnect for the cluster. 2. Use of PCI Express based protocols for data and information transfer within the cluster. 3. Ease of growth in bandwidth as the system requirements increase by increasing the number of links within the cluster. 4. Standardized PCIE component use in the cluster reduce initial cost. 5. Lower cost of growth due to standardization of hardware and software. 6. Path of expansion from a small cluster to larger clusters as need grows. 7. Future proofed system architecture. 8. Any speed increase in the link connection due to technology advance is directly applicable to the interconnection scheme.

In fact the disclosed interconnect scheme provides advantages for low latency multi-system cluster growth that are not available from any other source.

While the invention has been described in terms of several embodiments, those of ordinary skill in the art will recognize that the invention is not limited to the embodiments described, but can be practiced with modification and alteration within the spirit and scope of the appended claims. Multiple existing methods and methods developed using newly developed technology may be used to establish the hand shake between systems and to improve data transfer and latency. The description is thus to be regarded as illustrative instead of limiting and capable of using any new technology developments in the field of communication an data transfer. There are numerous other variations to different aspects of the invention described above, which in the interest of conciseness have not been provided in detail. Accordingly, other embodiments are limited only within the scope of the claims. 

1. An independently configurable PCI Express (hereinafter: PCIE) enabled network switch device, comprising: three or more PCIE ports, each of the three or more PCIE ports being configurable as inbound PCIE ports that are each connectable to one outbound PCIE port on a PCIE enabled computer root complex, wherein the PCIE enabled computer root complex is enabled for system interconnection; and wherein connecting each of the three or more inbound PCIE ports on the PCIE enabled network switch device to the outbound PCIE port on each of three or more PCIE enabled computer root complexes interconnects the three or more PCIE enabled computer root complexes in a cluster.
 2. The cluster of three or more PCIE enabled computer systems of claim 1, wherein to transfer a data packet from a first of the three or more interconnected PCIE enabled computer root complexes to a second of the interconnected three or more PCIE enabled computer root complexes, the data packet is first transferred via a first outbound port of the first PCIE enabled computer root complex to a first inbound port on the independently configurable network switch device, and then transmitted via a second inbound port on the independently configurable network switch device, to a second outbound port of the second PCIE enabled computer root complex.
 3. The independently configurable PCIE enabled network switch device of claim 2, wherein when the independently configurable PCIE enabled network switch device interconnects the three or more PCIE enabled computer root complexes, the PCIE enabled network switch device is configured as a hub of a star network with respect to data passed among the three or more PCIE enabled computer root complexes.
 4. The independently configurable network switch device of claim 2, wherein contrary to transfer operations of a legacy PCIE switch operating in a system having a legacy PCIE tree-structure where a root complex coupled to at least a CPU is located as a root of the PCIE tree, the independently configurable network switch device is software configurable to enable transfers, using PCIE protocol, of data packets back and forth among the three or more PCIE enabled computer root complexes, each PCIE enabled computer root complex having an outbound port enabled for system interconnection; wherein the outbound port of each of the three or more PCIE enabled computer root complexes is connectable to one of the inbound ports on the independently configurable network switch, thereby implementing a star network connection architecture with respect to interconnection and data transfer among the three or more interconnected PCIE enabled computer root complexes.
 5. The independently configurable network switch device of claim 2, further comprising a switch-to-switch interconnect module that provides an expansion connection enabling a first and a second independently configurable switch device to be interconnected to form a cluster of interconnected PCIE enabled computer root complexes.
 6. The independently configurable network switch device of claim 5, wherein to transfer a data packet from the first PCIE enabled computer root complex connected to the first independently configurable network switch device to a second PCIE enabled computer root complex connected to the second independently configurable network switch device, the data packet is first transferred via a first outbound port enabled for system interconnection on the first PCIE enabled computer root complex to a first inbound port on the first independently configurable network switch device, and then transmitted via a connection from a first switch-to-switch interconnect module on the first independently configurable network switch device to a second switch-to-switch interconnect module on the second independently configurable network switch device, and the data packet is then transmitted via a second inbound port on the second independently configurable network switch device to a second outbound port enabled for system interconnection on the second PCIE enabled computer root complex.
 7. The independently configurable PCIE enabled network switch device of claim 2, wherein a circuit for implementing the independently configurable network switch is implemented as a circuit embedded in a System-On-Chip device.
 8. The independently configurable PCIE enabled network switch device of claim 2, wherein the switch device is implemented as a semiconductor die attached to a multi-chip module.
 9. An independently configurable PCI Express (hereinafter: PCIE) enabled network switch device, comprising; a plurality of ports, wherein three or more PCIE enabled ports are each configurable as inbound ports, each inbound PCIE port being connectable to an outbound PCIE port enabled for system interconnection on one of three or more interconnected PCIE enabled computer root complexes; wherein for connections to the three or more inbound PCIE enabled ports, the network switch forms a hub of a star connected network topology interconnecting the three or more PCIE enabled computer root complexes, thereby forming a cluster, and enabling data to be transferred back and forth among the three or more PCIE enabled computer root complexes.
 10. The independently configurable network switch device of claim 9, wherein to transfer a data packet from a first of the three or more PCIE enabled computer root complexes to a second of the three or more PCIE enabled computer root complexes, the data packet is first transferred via a first outbound port enabled for system interconnection on the first PCIE enabled computer root complex to a first inbound port coupled to it on the independently configurable PCIE enabled network switch device, and then transmitted via a second inbound port on the independently configurable PCIE enabled network switch device, coupled to a second outbound PCIE enabled port enabled for system interconnection on the second of the three or more PCIE enabled computer root complexes.
 11. The independently configurable network switch device of claim 9, wherein contrary to transfer operations of a legacy PCIE switch operating in a system having a legacy PCIE tree-structure where a single computer system having a root complex is coupled to at least a CPU located at the root of the PCIE tree, the independently configurable PCIE enabled switch device is software configurable to enable connection for transfers, using PCIE protocol, of data packets back and forth among the three or more PCIE enabled computer root complexes, thereby implementing a star connection architecture with respect to interconnection and data transfers among the three or more interconnected PCIE enabled computer root complexes.
 12. The independently configurable network switch device of claim 9, further comprising a switch-to-switch interconnect module that provides an expansion connection enabling a first and a second independently configurable switch device to be interconnected to form a multi-network switch cluster; wherein to transfer a data packet from a first PCIE enabled computer root complex connected to the first independently configurable PCIE enabled network switch device to a second PCIE enabled computer root complex connected to the second independently configurable network switch device, the data packet is first transferred via a first outbound port enabled for system interconnection under control of the first PCIE enabled computer root complex to a first inbound port on the first PCIE enabled configurable network switch device, and then transmitted via a connection from a first switch-to-switch interconnect module on the first independently configurable network switch device to a second switch-to-switch interconnect module on the second independently configurable network switch device, and from there the data packet is transmitted via a second inbound PCIE port on the second independently configurable network switch device to a coupled second outbound PCIE port enabled for system interconnection on the second PCIE enabled computer root complex.
 13. A PCI Express (hereinafter: PCIE) enabled clustering system, the system comprising: three or more PCIE enabled computer root complexes, each of the three or more PCIE enabled computer root complexes having an outbound PCIE port enabled for system interconnection under control of the respective root complex; wherein the PCIE enabled computer root complexes are interconnected in a cluster through an independently configurable PCIE enabled network switch having three or more inbound PCIE enabled ports, each connectable to one outbound port of one of the three or more PCIE enabled computer root complexes enabled for system interconnection; wherein data is transferred using PCIE protocol back and forth among the three or more interconnected PCIE enabled computer root complexes of the cluster.
 14. The system of claim 13, wherein the independently configurable PCIE enabled network switch is further configurable to comprise: one or more outbound PCIE enabled ports, each outbound PCIE enabled port being connectable to a PCIE peripheral device comprising any of: an I/O device, a storage device, a storage processor, or a communication device; wherein the PCIE peripheral device is not a PCIE enabled computer root complex.
 15. The system of claim 13, wherein to transfer a data packet within the cluster from a first of the three or more PCIE enabled computer root complexes to a second of the three or more of PCIE enabled computer root complexes, the data packet is first transferred via a first outbound PCIE port enabled for system interconnection under control of the respective root complex on the first PCIE enabled computer root complex to a first inbound port on the independently configurable switch device, and then transferred via a second inbound PCI enabled port on the independently configurable switch device, to a second outbound PCIE port enabled for system interconnection under control of the respective root complex of the second of the plurality of PCIE enabled computer root complexes.
 16. The system of claim 13, wherein for each of the inbound PCIE ports on the independently configurable network switch device, and contrary to transfer operations of a legacy PCIE switch operating in a system having a legacy PCIE tree-structure where a single computer system and single root complex are located at a root of the PCIE tree, the independently configurable switch device is software configurable to enable transfers, using PCIE protocol, of data packets back and forth among the three or more of PCIE enabled computer root complexes, each enabled for system interconnection, thereby implementing a star connection network topology with the configurable switch device as its hub for interconnection and data transfer among the three or more PCIE enabled computer root complexes.
 17. The system of claim 13, wherein each configurable network switch device further comprises a switch-to-switch interconnect module that provides an expansion connection enabling first and second network switch devices to be interconnected to form a multi-switch cluster comprising a plurality of independently configurable network switch devices that are interconnected; wherein to transfer a data packet from the first PCIE enabled computer root complex connected to the first independently configurable network switch device to a second PCIE enabled computer root complex connected to the second independently configurable network switch device, the data packet is first transferred via a first outbound port enabled for system interconnection on the first PCIE enabled computer root complex to a first inbound port on the first independently configurable network switch device, and then transmitted via a connection from a first switch-to-switch interconnect module on the first independently configurable network switch device to a second switch-to-switch interconnect module on the second independently configurable network switch device, and the data packet is then transmitted via a second inbound port on the second independently configurable network switch device to a second outbound port enabled for system interconnection on the second PCIE enabled computer root complex.
 18. The system of claim 13, wherein a circuit for implementing the independently configurable PCIE enabled network switch is implemented as a circuit embedded in a System-On-Chip device.
 19. The system of claim 13 wherein the independently configurable PCIE enabled network switch device is implemented as a semiconductor die attached to a multi-chip module.
 20. An independently configurable PCI Express (hereinafter: PCIE) enabled switch device, comprising: (i) three or more first PCIE enabled ports, each of the three or more first PCIE enabled ports configurable as inbound PCIE ports that are each connectable to an outbound PCIE port of a PCIE enabled computer root complex that is enabled for system interconnection; and (ii) one or more second PCIE enabled ports, each second PCIE enabled port configurable as an outbound PCIE port that is connectable to a PCIE port on a non-computer system PCIE enabled peripheral device comprising any of: an IO device, a storage device, a storage processor, or a communication device; wherein when the three or more first PCIE enabled ports are configured as inbound PCIE ports and connected to outbound ports on three or more computer root complexes, the independently configurable PCIE enabled switch device acts as the hub of a star connection architecture enabling data to be transferred back and forth among the three or more computer root complexes, thereby implementing a cluster of interconnected computer root complexes; and wherein the PCIE port on each non-computer system PCIE enabled peripheral device has a PCIE module at the port to enable the connection to one of the one or more second PCIE enabled ports on the configurable switch device.
 21. The independently configurable PCIE enabled switch device of claim 20, wherein interconnecting the three or more PCIE enabled computer root complexes through the independently configurable PCIE enabled switch device forms a cluster using a star network architecture with respect to connections made to the inbound PCIE enabled ports on the independently configurable PCIE enabled switch device.
 22. The independently configurable PCIE enabled switch device of claim 21, wherein to transfer a data packet within the cluster from a first of the three or more PCIE enabled computer root complexes to a second of the three or more PCIE enabled computer root complexes, the data packet is first transferred via a first outbound PCIE port on the first of the three or more PCIE enabled computer root complexes, to a first inbound port on the independently configurable PCIE enabled switch device, and then transferred via a second inbound port on the independently configurable PCIE enabled switch device to a second outbound port on the second of the three or more PCIE enabled computer root complexes.
 23. The independently configurable PCIE enabled switch device of claim 20, wherein each configurable network switch device further comprises a switch-to-switch interconnect module that provides an expansion connection enabling a first and a second independently configurable network switch device to be interconnected to form a multi-switch cluster with a plurality of independently configurable network switch devices that are interconnected.
 24. The independently configurable PCIE enabled switch device of claim 23, wherein to transfer a data packet from the first PCIE enabled computer root complex connected to the first independently configurable network switch device to a second PCIE enabled computer root complex connected to the second independently configurable network switch device, the data packet is first transferred via a first outbound port enabled for system interconnection on the first PCIE enabled computer root complex to a first inbound port on the first independently configurable network switch device, and then transmitted via a connection from a first switch-to-switch interconnect module on the first independently configurable network switch device to a second switch-to-switch interconnect module on the second independently configurable network switch device, and the data packet is then transmitted via a second inbound port on the second independently configurable network switch device to a second outbound port enabled for system interconnection on the second PCIE enabled computer root complex.
 25. The independently configurable PCIE enabled network switch device of claim 20, wherein a circuit for implementing the independently configurable network switch is implemented as a circuit embedded in a System-On-Chip device.
 26. The independently configurable PCIE enabled network switch device of claim 20 wherein the switch device is implemented as a semiconductor die attached to a multi-chip module. 